1. Field of the Invention
The present invention relates to a semiconductor device and the method of manufacture and, particularly, relates to a semiconductor device having memory functions.
2. Description of Related Art
As one type of nonvolatile memory, a floating gate nonvolatile memory is conventionally known. This memory demonstrates nonvolatile memory functions by injecting carriers to a floating gate and holding therein.
With this type of nonvolatile memory, the floating gate EPROM at a p-channel having an MOS structure was first used for practical purposes. For this type of floating gate, polycrystalline silicon doped with a large quantity of impurities is used, and carriers are injected to floating gates (for writing or programming) by causing avalanche breakdown at drain junctions. This type of nonvolatile memory is called FAMOS (Floating-gate Avalanche-injection MOS). The information written in FAMOS can be erased by the irradiation of ultraviolet rays and X-rays at a sufficiently high energy level.
Nonvolatile memory, having a structure wherein a control gate made of polycrystalline silicon is laminated on the FAMOS floating gate, is called SAMOS (Stacked-gate Avalanche-injection MOS) memory. An appropriate level of voltage is applied to the control gate during the injection process of carriers for avalanche breakdown, so that an electric field near a drain is intensified and avalanche breakdown is likely to occur. At the same time, the electrons generated by the avalanche breakdown may be more effectively attracted to the side of a floating gate, thereby shortening the writing time. Additionally, the control gate may be used like the gate electrodes of normal MOS transistors during the process of information readout.
Devices having an SAMOS structure at an n-channel have been recently referred to as FAMOS, and have become the standard EPROM structure. In this case, channel hot electrons are injected into a floating gate.
Furthermore, according to other research, MOS memory has been proposed as in the thesis, “MOS Memory Using Germanium Nanocrystals Formed by Thermal Oxidation of Sil-xGex, Ya-Chin King et al., IEDM 98 115-118.” This is a memory element in which a charge trapping bodies comprising germanium fine particles are buried in an MOSFET gate insulating body. On the other hand, since economical glass substrates, instead of expensive quartz substrates, may be used and preferable TFT characteristics may be easily obtained, the polysilicon TFT formed in the process of a relatively low temperature (about 600° C. or below) has been focused upon.
However, although this TFT is used for the picture elements of displays and peripheral circuits, it is not a device that could be used as a memory element like the above-noted MOS memory. Therefore, a memory and a display cannot be mounted on one panel in one body in, for example, an active matrix display in which a TFT is used for a picture element unit. This is one of the obstacles to the further miniaturization and electricity reduction of liquid crystal display devices or the like.